by Afifi, SM, Verdier, F and Belleudy, C
Abstract:
FPGA is considered to be a good platform for rapid prototyping of embedded designs. The power consumption is a growing problem with FPGAs, which is required to be optimized. In this paper, a method is proposed to estimate the dynamic power consumption of Micro Blaze based processing unit used in embedded designs for FPGA. The proposed method is based on experimental bench of implemented designs where the processing unit is repeated distinctly, and on real power measurements after downloading implemented applications on Virtex-6 FPGA using Xilinx Chip Scope tool. As a result of the considerable dynamic power variation, the dynamic power consumption of the Micro Blaze processing unit without the Floating Point Unit (FPU) is estimated to be 84 mW, and 102 mW with enabling the FPU. The proposed method is verified to be accurate, by comparing its based realistic power measurements with the XPower estimated results. © 2014 IEEE.
Reference:
Power estimation method based on real measurements for processor-based designs on FPGA (Afifi, SM, Verdier, F and Belleudy, C), In Proceedings – 2014 International Conference on Computational Science and Computational Intelligence, CSCI 2014, IEEE Computer Society, volume 2, 2014.
Bibtex Entry:
@inproceedings{afifi2014powerfpga,
author = "Afifi, SM and Verdier, F and Belleudy, C",
booktitle = "Proceedings - 2014 International Conference on Computational Science and Computational Intelligence, CSCI 2014",
pages = "260--263",
publisher = "IEEE Computer Society",
title = "Power estimation method based on real measurements for processor-based designs on FPGA",
volume = "2",
year = "2014",
abstract = "FPGA is considered to be a good platform for rapid prototyping of embedded designs. The power consumption is a growing problem with FPGAs, which is required to be optimized. In this paper, a method is proposed to estimate the dynamic power consumption of Micro Blaze based processing unit used in embedded designs for FPGA. The proposed method is based on experimental bench of implemented designs where the processing unit is repeated distinctly, and on real power measurements after downloading implemented applications on Virtex-6 FPGA using Xilinx Chip Scope tool. As a result of the considerable dynamic power variation, the dynamic power consumption of the Micro Blaze processing unit without the Floating Point Unit (FPU) is estimated to be 84 mW, and 102 mW with enabling the FPU. The proposed method is verified to be accurate, by comparing its based realistic power measurements with the XPower estimated results. © 2014 IEEE.",
doi = "10.1109/CSCI.2014.133",
isbn = "9781479930098",
keyword = "FPGA",
keyword = "FPU",
keyword = "IP",
keyword = "Micro Blaze",
keyword = "Power Consumption",
language = "eng",
}